1. Field of the Invention
The present invention generally relates to systems configured to reduce distortion of a resist during a metrology process. Certain embodiments relate to a system that includes a cooling subsystem and/or a drying subsystem coupled to an electron beam metrology tool.
2. Description of the Related Art
The following description and examples are not admitted to be prior art by virtue of their inclusion in this section.
Fabricating semiconductor devices such as logic and memory devices typically includes processing a substrate such as a semiconductor wafer using a number of semiconductor fabrication processes to form various features and multiple levels of the semiconductor devices. For example, lithography is a semiconductor fabrication process that involves transferring a pattern from a reticle to a resist arranged on a semiconductor wafer. Additional examples of semiconductor fabrication processes include, but are not limited to, chemical-mechanical polish, etch, deposition, and ion implantation. Multiple semiconductor devices may be fabricated in an arrangement on a semiconductor wafer and then separated into individual semiconductor devices.
As the dimensions of semiconductor devices shrink, metrology processes used to measure characteristics of the semiconductor devices become increasingly important. For instance, the acceptable variation in the characteristics of the features of the semiconductor devices (e.g., critical dimension, “CD”) also decreases. Therefore, accuracy requirements of metrology processes and tools have become more stringent. In addition, as the dimensions of semiconductor devices shrink, the capability of metrology tools (e.g., resolution) have increased. In many instances, previously sufficient technologies (e.g., optical microscopy) have been replaced with more advanced and complex technologies (e.g., scanning electron microscopy, “SEM”).
Such advanced technologies, aside from being complex, often have different problems than previously used metrology technologies. For instance, it is well known that 193 nm resist features change size permanently (e.g., shrink) during CD-SEM measurements. The shrinkage will have an effect on the semiconductor features formed using the resist. The extent of the shrinkage, often up to 40 nm, should be compared to the CD metrology budget of 1 nm for features in the 100 nm design rule node, at which 193 nm lithography is expected to enter production for critical layers. Most resist classes and layer schemes exhibit shrinkage to varying degrees depending on their formulations, process history, and measurement conditions. Shrinkage is observed to progress in a non-linear manner with applied e-beam dose, and understanding the mechanisms that contribute to this shrinkage is complex. Several studies have reported the attempt to improve this understanding as a basis to improve the resist materials. As yet, complete elimination of e-beam initiated shrinkage has not been achieved.
Shrinkage has previously been reported to change in an absolute way, rather than as a percentage of feature size. This absolute change implies that shrinkage is a surface effect, which is easily understood due to the limited penetration depth of the electrons from the CD-SEM. As described by Hoffmann et al., in “Investigation of 193 nm Resist Shrinkage During CD-SEM Measurements,” Yield Management Solutions, Fall 2001, pp. 32-36, decreasing the electron beam energy reduced the size of all shrinkage mechanisms. Hoffmann et al. demonstrate this effect with measurements taken with a 400 eV beam. This dependency can be understood because the interaction volume is smaller and less energy is deposited in the resist as the energy decreases. Estimates of the range taken from published tables show that expected electron penetration depths are consistent with energy dependence seen in the data. Hoffmann et al. also note that the lower energy data shows greater scattering because the smaller number of secondary electrons emitted from the sample reduces the signal-to-noise ratio of the linescan signals.
First experiments performed by Hoffmann et al. indicated that beam current has little effect on shrinkage. However, further data shows that the intermediate shrinkage region for all beam currents overlap, in agreement with the early observations that this regime is independent of beam current. The long term shrinkage mechanism also changes with beam current. At 40 pA, a higher than normal beam current, a trench can be seen to narrow once the other mechanisms have stabilized. An alternative analysis of the beam current data with different applied offsets could lead to the conclusion that all of the shrinkage regimes depend on beam current. The precision of the data did not vary greatly until the beam current was reduced to 5 pA, which reflects the reduced signal-to-noise at this low beam current, analogous to the trend with beam energy.
Irrespective of the different mechanisms occurring in the resist, the above work has been used to make recommendations for 193 nm resist measurements. Lithographic performance is best characterized by measuring feature dimensions before induced shrinkage. Therefore, it would be advantageous to substantially reduce shrinkage to increase the usefulness of the SEM measurements. In production, after-develop inspection (ADI) is used to control and predict the after-etch (AEI) feature size. The etch environment may quickly cause the resist to shrink in a manner similar to which it shrinks in the CD-SEM. It is tempting to suggest that, under these conditions, measuring the fully shrunken dimensions at ADI might give a reasonable prediction of the AEI dimension.
In determining zero-dose dimensions (i.e., dimensions of the resist before exposure to the electron beam), it is vital to consider sources of random and systematic error in the measurements. Random errors can be attributed to variations in linescans caused by the usual effects that contribute to static and dynamic precision in a CD-SEM. Systematic errors may be attributed to uncertainties in the fits of successive measurements leading to the estimates of the CD of the undosed feature. In 248 nm resist metrology, systematic errors could largely be ignored, and the best conditions could be chosen to optimize dynamic precision. For 193 nm resist metrology, the systematic errors can no longer be ignored.
To reduce systematic errors, multiple measurements could be taken in a dose regime where the medium term mechanism dominates. An e-beam current of 10 pA will allow reduced contributions to the systematic errors from the fast shrinkage mechanism and still allow good signal-to-noise to be obtained. A beam energy of around 500 eV should be the optimum balancing point between “dynamic” and “systematic” errors. Using a beam energy of 400 eV would not provide enough signal-to-noise ratio for good statistics on the linescan data, and challenges the creation of truly robust production recipes. 600 eV may be tolerable, but higher energies would cause greater systematic uncertainties. Manual measurements cannot be used because the uncontrolled dosing of samples would lead to variations in shrinkage.
Once collected, the trend of the data has to be corrected for shrinkage. A linear fit would no longer be sufficient, as the fast shrinkage has to be accounted for in the correction. Accurate correction of this fast shrinkage is likely to give the most problems in future metrology. The coefficient of the fit would depend on the resist and measurement conditions.
As the beam energy and current are reduced, other problems with the SEM performance may arise. For example, low beam energy can produce a relatively small signal-to-noise ratio and loss in image resolution that can introduce uncertainty into the measurements. Therefore, some attempts to offset the low beam energy and current have been made. For example, Applied Materials, Inc., Santa Clara, Calif., has introduced a CD-SEM that provides precision level capabilities that are a result of the design of its electron beam column, and the various algorithms it uses in its measurements. For instance, the tool has an improved accelerating module in the column, which accelerates the electrons about 50 times faster than before, to produce a narrow beam and a small spot size, which results in higher resolution and better precision. However, this is also attained using lower voltages. While a standard CD-SEM operates within a range of 400-800 eV, the new platform is fully operational at less than or equal to 200 eV. This capability provides the device maker with minimal and stable resist shrinkage, enabling tight metrology for 193 nm lithography.
Attempts have, therefore, been made to reduce the current and landing energy (power density) of the incoming beam in a SEM in order to reduce shrinkage. There are, however, several disadvantages to these methods and systems. For example, as current and landing energies are reduced, image resolution and throughput suffer. In addition, current and landing energies have been reduced to a level that still causes shrinkage in the photoresist. The alternative approach requires significant increases in landing energy, to the order of several tens of kV, such that the deposited electron energy is well below the photoresist surface thereby limiting surface damage to the photoresist and reducing line shrinkage. However, such approaches increase the risk that the deposited electron energy may damage other structures that may be present on the wafer. In addition, altering the electron column to increase electron acceleration as described above may increase the complexity and cost of the system.
In a related theme, suggestions have been made that resists could be stabilized, presumably both against e-beam- and etch-induced shrinkage, by introducing a pre-conditioning process such as UV irradiation, e-beam cure, or thermal processing. For example, as described in U.S. Patent Application Publication No. US 2003/0132197 by Ke et al., e-beam curing is the use of an e-beam to cure the photoresist so that it subsequently will not shrink when CD-SEM measurements are taken. The cross-linking of the resist caused by e-beam curing, which prevents subsequent resist shrinkage, however, also affects the profile of the photoresist, especially in corner areas. This is disadvantageous because it means that the photoresist itself changes shape, which is problematic for later semiconductor fabrication processing that contemplates usage of a particular shape or profile of the resist. E-beam curing may also potentially cause electron charge damage to the semiconductor device being fabricated. Ke et al. also describe using plasma curing to prevent photoresist shrinkage.
Accordingly, it may be advantageous to develop systems and methods for reducing, and even substantially eliminating, the distortion and/or shrinkage of a resist during a metrology process without decreasing the image resolution and throughput, without increasing the risk of electron beam damage to other structures present on the specimen, and without substantial changes to the electron column, in the case of an electron beam metrology tool.